With this Seed Grant, the DSC supports the presentation of the work “CHERI-VP: Evaluating CHERI Early for Embedded RISC-V Systems with Virtual Prototypes” at the RISC-V Summit Europe 2026 in Bologna. The research mainly focuses on developing suitable benchmarks for CHERI-enabled embedded systems in the early stages of development. This is achieved through a data-driven approach, where randomly generated instruction streams are adapted and tailored to meet specific architectural and security requirements. In addition, virtual prototyping with benchmark-driven analysis is used to assess the performance of said systems under challenging conditions. Thus, the research addresses the current lack of suitable benchmarks for CHERI-enabled RISC-V systems during the initial stages of development.

Central to the presented work is the integration of emerging technologies, such as in-memory computing (IMC), into CHERI-enabled RISC-V systems.  Using VP-based simulations, the research demonstrates that applying IMC to CHERI-enabled systems improves the efficiency of memory operations, reducing the performance-security trade-off before hardware implementation. Hence, the work combines computer architecture research and data-driven methods while fostering cross-disciplinary competencies in data-driven systems research.

Presenting the research at the RISC-V Summit Europe 2026 will also support scientific exchange with the international RISC-V and CHERI research communities. This will pave the way for future collaborations and enhance the visibility of data-driven computer architecture research at the University of Bremen.

Funding recipient:

Spandan Das, M.Sc. (Faculty 03 – Mathematics and Computer Science)

Funding period:

08 June 2026 – 12 June 2026

Are you interested in the DSC Seed Grant?

You can find more information about the DSC Seed Grant here.

For questions, please contact:

Dr. Lena Steinmann
DSC Coordinator
Tel. +49 (421) 218 - 63941
E-Mail: lena.steinmannprotect me ?!uni-bremenprotect me ?!.de